Green Journals

ASIC implementation of an LSTM neural network

Cicero Zanoni, Cláudio Diniz, Mateus Grellert

2026-9-23 Vol. 21 Issue 2 Pages 1-10

DOI: 10.29292/jics.v21i2.1218

Implementation and Evaluation of two 32-Point Butterfly FFT Accelerators in a RISC-V Core

Bruno Soares Zimmer, Pedro Pereira, Sergio Bampi et al.

2026-9-16 Vol. 21 Issue 2

DOI: 10.29292/jics.v21i2.1177

Comparative Analysis of Formal and Simulation-Based Verification Techniques for Digital Circuits

Ítala Lorrane Silva Couto, Érica Cota

2026-9-16 Vol. 21 Issue 2

DOI: 10.29292/jics.v21i2.1194

Comparative Analysis of RISC-V and ARM in AI Applications

Andre Reges Souza Meira, Edward David Moreno, Calebe Micael Oliveira Conceição

2026-9-16 Vol. 21 Issue 2 Pages 1-9

DOI: 10.29292/jics.v21i2.1183

Approximate Adders: An Exploration on Logical and Physical Synthesis and Image Quality Impact

Vítor De Melo Mandowski, Talita A. B. Caneda, Pedro T. L. Pereira et al.

2026-9-16 Vol. 21 Issue 2

DOI: 10.29292/jics.v21i2.1219

Physical Design of Hardware-Accelerated Publish-Subscribe Middleware for Embedded Systems

Jean Carlo Hamerski, Cláudio Machado Diniz

2026-9-15 Vol. 21 Issue 2 Pages 1-11

DOI: 10.29292/jics.v21i2.1178

Design of a BiCMOS Load Modulated Balanced Amplifier for Operation in FR3

Alexandre Zem de Morais, César Barreto Cristofoli, João Paulo Perbiche et al.

2026-9-15 Vol. 21 Issue 2 Pages 1-12

DOI: 10.29292/jics.v21i2.1220

Bridging the Gap Between Pedagogical and Practical RISC-V Systems: A Reproducible FPGA Implementation and Verification Flow

Pedro Pereira Cecilio Ventura, Lucas Fernando de Souza Lima, Ilana Chaia Finger et al.

2026-9-6 Vol. 21 Issue 2 Pages 1-12

DOI: 10.29292/jics.v21i2.1180

Puppy: An Open and Silicon-Validated RISC-V Microcontroller as a Foundation for a National Embedded Systems Platform

Gabriel Gouveia, Catherine Pancotto, Ivan Hirata et al.

2026-9-2 Vol. 21 Issue 2 Pages 1-11

DOI: 10.29292/jics.v21i2.1175

A 10-bit SAR ADC with AFE for Solar Energy Applications

Állan Ferreira, Hugo Dias Gilo, Jo˜ao Carlos Prats Ramos et al.

2026-9-2 Vol. 21 Issue 2 Pages 1-11

DOI: 10.29292/jics.v21i2.1216

Year	A+	A	B	C
2026			✓
2025			✓
2024			✓
2023			✓
2021/2022			✓
2020			✓
2019			✓
2018

Journal Report

Journal Information

Classification History

Recent Articles

ASIC implementation of an LSTM neural network

Implementation and Evaluation of two 32-Point Butterfly FFT Accelerators in a RISC-V Core

Comparative Analysis of Formal and Simulation-Based Verification Techniques for Digital Circuits

Comparative Analysis of RISC-V and ARM in AI Applications

Approximate Adders: An Exploration on Logical and Physical Synthesis and Image Quality Impact

Physical Design of Hardware-Accelerated Publish-Subscribe Middleware for Embedded Systems

Design of a BiCMOS Load Modulated Balanced Amplifier for Operation in FR3

Bridging the Gap Between Pedagogical and Practical RISC-V Systems: A Reproducible FPGA Implementation and Verification Flow

Puppy: An Open and Silicon-Validated RISC-V Microcontroller as a Foundation for a National Embedded Systems Platform

A 10-bit SAR ADC with AFE for Solar Energy Applications